Public Attributes

cudaDeviceProp Struct Reference

#include <cuda_runtime.h>

List of all members.

Public Attributes

char name [256]
size_t totalGlobalMem
size_t sharedMemPerBlock
int regsPerBlock
int warpSize
size_t memPitch
int maxThreadsPerBlock
int maxThreadsDim [3]
int maxGridSize [3]
int clockRate
size_t totalConstMem
int major
int minor
size_t textureAlignment
size_t texturePitchAlignment
int deviceOverlap
int multiProcessorCount
int kernelExecTimeoutEnabled
int integrated
int canMapHostMemory
int computeMode
int maxTexture1D
int maxTexture1DLinear
int maxTexture2D [2]
int maxTexture2DLinear [3]
int maxTexture2DGather [2]
int maxTexture3D [3]
int maxTextureCubemap
int maxTexture1DLayered [2]
int maxTexture2DLayered [3]
int maxTextureCubemapLayered [2]
int maxSurface1D
int maxSurface2D [2]
int maxSurface3D [3]
int maxSurface1DLayered [2]
int maxSurface2DLayered [3]
int maxSurfaceCubemap
int maxSurfaceCubemapLayered [2]
size_t surfaceAlignment
int concurrentKernels
int ECCEnabled
int pciBusID
int pciDeviceID
int pciDomainID
int tccDriver
int asyncEngineCount
int unifiedAddressing
int memoryClockRate
int memoryBusWidth
int l2CacheSize
int maxThreadsPerMultiProcessor

Member Data Documentation

Number of asynchronous engines

Device can map host memory with cudaHostAlloc/cudaHostGetDevicePointer

Clock frequency in kilohertz

Compute mode (See cudaComputeMode)

Device can possibly execute multiple kernels concurrently

Device can concurrently copy memory and execute a kernel. Deprecated. Use instead asyncEngineCount.

Device has ECC support enabled

Device is integrated as opposed to discrete

Specified whether there is a run time limit on kernels

Size of L2 cache in bytes

Major compute capability

Maximum size of each dimension of a grid

Maximum 1D texture size

Maximum 1D layered texture dimensions

Maximum 2D texture dimensions

Maximum 2D layered texture dimensions

Maximum 3D texture dimensions

Maximum size of each dimension of a block

Maximum number of threads per block

Maximum resident threads per multiprocessor

Global memory bus width in bits

Peak memory clock frequency in kilohertz

Maximum pitch in bytes allowed by memory copies

Minor compute capability

Number of multiprocessors on device

ASCII string identifying device

PCI bus ID of the device

PCI device ID of the device

PCI domain ID of the device

32-bit registers available per block

Shared memory available per block in bytes

Alignment requirements for surfaces

1 if device is a Tesla device using TCC driver, 0 otherwise

Alignment requirement for textures

Constant memory available on device in bytes

Global memory available on device in bytes

Device shares a unified address space with the host

Warp size in threads

The documentation for this struct was generated from the following files:
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